CPU: introduce cpu_atomic_xchg()
authorarighi <arighi@38d2e660-2303-0410-9eaa-f027e97ec537>
Mon, 1 Nov 2010 16:26:07 +0000 (16:26 +0000)
committerarighi <arighi@38d2e660-2303-0410-9eaa-f027e97ec537>
Mon, 1 Nov 2010 16:26:07 +0000 (16:26 +0000)
Add an architecture-optimized function to atomically exchange two
different cpu_atomic_t values.

More exactly, the function replaces the value of a cpu_atomic_t variable
and returns the old value, atomically.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4485 38d2e660-2303-0410-9eaa-f027e97ec537

bertos/cpu/byteorder.h

index ff1237adf3a52e8a6a9c8714f41ba23cdf341d21..721f81e51435b9c1554728e1be917ebf98bf85de 100644 (file)
@@ -41,6 +41,7 @@
 #include <cfg/compiler.h>
 #include <cpu/attr.h>
 #include <cpu/detect.h>
+#include <cpu/types.h>
 #include <cfg/macros.h>
 
 /**
@@ -168,6 +169,37 @@ INLINE float net_to_host_float(float x)
        return be_float_to_cpu(x);
 }
 
+#if CPU_ARM
+INLINE cpu_atomic_t
+cpu_atomic_xchg(volatile cpu_atomic_t *ptr, cpu_atomic_t val)
+{
+       cpu_atomic_t ret;
+
+       asm volatile(
+               "swp     %0, %1, [%2]"
+
+               : "=&r" (ret)
+               : "r" (val), "r" (ptr)
+               : "memory", "cc");
+
+       return ret;
+}
+#else /* CPU_ARM */
+#include <cpu/irq.h>
+
+INLINE cpu_atomic_t
+cpu_atomic_xchg(volatile cpu_atomic_t *ptr, cpu_atomic_t val)
+{
+       cpu_atomic_t ret;
+
+       ATOMIC(
+               ret = *ptr;
+               *ptr = val;
+       );
+       return ret;
+}
+#endif /* CPU_ARM */
+
 #ifdef __cplusplus
 
 /// Type generic byte swapping.