Fix a bug when 2 irqs on the same serial are pending: set lo level sensitive.
authorbatt <batt@38d2e660-2303-0410-9eaa-f027e97ec537>
Wed, 23 Apr 2008 13:27:52 +0000 (13:27 +0000)
committerbatt <batt@38d2e660-2303-0410-9eaa-f027e97ec537>
Wed, 23 Apr 2008 13:27:52 +0000 (13:27 +0000)
git-svn-id: https://src.develer.com/svnoss/bertos/trunk@1233 38d2e660-2303-0410-9eaa-f027e97ec537

bertos/cpu/arm/drv/ser_at91.c

index 74cca47bffdbdfd47949e0e9f60f95890d09d79a..f42af89de65cc185e05ce26321402607a5a27cf1 100644 (file)
@@ -287,8 +287,8 @@ static void uart0_init(
        US0_IDR = 0xFFFFFFFF;
        /* Set the vector. */
        AIC_SVR(US0_ID) = uart0_irq_dispatcher;
-       /* Initialize to edge triggered with defined priority. */
-       AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY;
+       /* Initialize to level sensitive with defined priority. */
+       AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | SERIRQ_PRIORITY;
        PMC_PCER = BV(US0_ID);
 
        /*
@@ -382,8 +382,8 @@ static void uart1_init(
        US1_IDR = 0xFFFFFFFF;
        /* Set the vector. */
        AIC_SVR(US1_ID) = uart1_irq_dispatcher;
-       /* Initialize to edge triggered with defined priority. */
-       AIC_SMR(US1_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY;
+       /* Initialize to level sensitive with defined priority. */
+       AIC_SMR(US1_ID) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | SERIRQ_PRIORITY;
        PMC_PCER = BV(US1_ID);
 
        /*