+#if IMPLEMENT_SER_UART4
+ USART_DRE_INTERRUPT_VECTOR(USARTD1_DRE_vect, SER_UART4)
+ USART_RXC_INTERRUPT_VECTOR(USARTD1_RXC_vect, SER_UART4)
+#endif
+#if IMPLEMENT_SER_UART5
+ USART_DRE_INTERRUPT_VECTOR(USARTE1_DRE_vect, SER_UART5)
+ USART_RXC_INTERRUPT_VECTOR(USARTE1_RXC_vect, SER_UART5)
+#endif
+#if IMPLEMENT_SER_UART6
+ USART_DRE_INTERRUPT_VECTOR(USARTF0_DRE_vect, SER_UART6)
+ USART_RXC_INTERRUPT_VECTOR(USARTF0_RXC_vect, SER_UART6)
+#endif
+#if IMPLEMENT_SER_UART7
+ USART_DRE_INTERRUPT_VECTOR(USARTF1_DRE_vect, SER_UART7)
+ USART_RXC_INTERRUPT_VECTOR(USARTF1_RXC_vect, SER_UART7)
+#endif
+
+#ifdef SER_UART_BUS_TXOFF
+ static inline void USART_handleTXCInterrupt(uint8_t usartNumber)
+ {
+ SER_STROBE_ON;
+ struct FIFOBuffer * const txfifo = &ser_handles[usartNumber]->txfifo;
+ if (fifo_isempty(txfifo))
+ {
+ SER_UART_BUS_TXOFF(UARTDescs[usartNumber].usart);
+ UARTDescs[usartNumber].sending = false;
+ }
+ else
+ {
+ SER_UART_BUS_TXBEGIN(UARTDescs[usartNumber].usart);
+ }
+ SER_STROBE_OFF;
+ }
+
+ /*
+ * Serial port 0 TX complete interrupt handler.
+ *
+ * This IRQ is usually disabled. The UDR-empty interrupt
+ * enables it when there's no more data to transmit.
+ * We need to wait until the last character has been
+ * transmitted before switching the 485 transceiver to
+ * receive mode.
+ *
+ * The txfifo might have been refilled by putchar() while
+ * we were waiting for the transmission complete interrupt.
+ * In this case, we must restart the UDR empty interrupt,
+ * otherwise we'd stop the serial port with some data
+ * still pending in the buffer.
+ */
+ #define USART_TXC_INTERRUPT_VECTOR(_vector, _usart) \
+ DECLARE_ISR(_vector) \
+ { \
+ USART_handleTXCInterrupt( _usart ); \
+ }
+
+ #if IMPLEMENT_SER_UART0
+ USART_TXC_INTERRUPT_VECTOR(USARTC0_TXC_vect, SER_UART0)
+ #endif
+ #if IMPLEMENT_SER_UART1
+ USART_TXC_INTERRUPT_VECTOR(USARTD0_TXC_vect, SER_UART1)
+ #endif
+ #if IMPLEMENT_SER_UART2
+ USART_TXC_INTERRUPT_VECTOR(USARTE0_TXC_vect, SER_UART2)
+ #endif
+ #if IMPLEMENT_SER_UART3
+ USART_TXC_INTERRUPT_VECTOR(USARTC1_TXC_vect, SER_UART3)
+ #endif
+ #if IMPLEMENT_SER_UART4
+ USART_TXC_INTERRUPT_VECTOR(USARTD1_TXC_vect, SER_UART4)
+ #endif
+ #if IMPLEMENT_SER_UART5
+ USART_TXC_INTERRUPT_VECTOR(USARTE1_TXC_vect, SER_UART5)
+ #endif
+ #if IMPLEMENT_SER_UART6
+ USART_TXC_INTERRUPT_VECTOR(USARTF0_TXC_vect, SER_UART6)
+ #endif
+ #if IMPLEMENT_SER_UART7
+ USART_TXC_INTERRUPT_VECTOR(USARTF1_TXC_vect, SER_UART7)
+ #endif
+#endif /* SER_UART_BUS_TXOFF */