sam3n port: set flash wait states before activating fast clock

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4414 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/drv/clock_sam3.c b/bertos/cpu/cortex-m3/drv/clock_sam3.c
index b0486c51d992ef94edcf16a7e60e4e382ee09a53..fef0f1259e4164d62a5a1db467e627a06ff608dd 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/clock_sam3.c
+++ b/bertos/cpu/cortex-m3/drv/clock_sam3.c
@@ -38,6 +38,7 @@
 #include "clock_sam3.h"
 #include <io/sam3_pmc.h>
 #include <io/sam3_sysctl.h>
+#include <io/sam3_flash.h>
 #include <cfg/compiler.h>
 #include <cfg/macros.h>
 
@@ -90,6 +91,9 @@ void clock_init(void)
 {
        uint32_t timeout;
 
+       /* Set 4 wait states for flash access, needed for higher CPU clock rates */
+       EEFC_FMR_R = EEFC_FMR_FWS(3);
+
        // Select external slow clock
        if (!(SUPC_SR_R & SUPC_SR_OSCSEL))
        {