+ #if defined (__ARM_AT91SAM3S4__)
+ #define CPU_CM3_AT91SAM3 1
+ #define CPU_CM3_AT91SAM3S 1
+ #define CPU_CM3_AT91SAM3S4 1
+ #define CPU_NAME "AT91SAM3S4"
+
+ #define CPU_CM3_AT91SAM3N 0
+ #define CPU_CM3_AT91SAM3U 0
+ #else
+ #define CPU_CM3_AT91SAM3S4 0
+ #endif
+
+ #if defined (__ARM_AT91SAM3U4__)
+ #define CPU_CM3_AT91SAM3 1
+ #define CPU_CM3_AT91SAM3U 1
+ #define CPU_CM3_AT91SAM3U4 1
+ #define CPU_NAME "AT91SAM3U4"
+
+ #define CPU_CM3_AT91SAM3N 0
+ #define CPU_CM3_AT91SAM3S 0
+ #else
+ #define CPU_CM3_AT91SAM3U4 0
+ #endif
+