Signed-off by Robin Gilham:

Support for the STM32F102 chip.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@5177 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/drv/clock_stm32.h b/bertos/cpu/cortex-m3/drv/clock_stm32.h
index e91753d62a06498a7c9c2a7c47899ce7a72c60bc..2538abc411d678645a5931fbdb224333d2c6abd5 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/clock_stm32.h
+++ b/bertos/cpu/cortex-m3/drv/clock_stm32.h
@@ -251,7 +251,9 @@
 /*\}*/
 
 /* Crystal frequency of the main oscillator (8MHz) */
+#ifndef PLL_VCO
 #define PLL_VCO                    8000000
+#endif
 
 /* Reset and Clock Controller registers */
 struct RCC

diff --git a/bertos/cpu/cortex-m3/io/stm32.h b/bertos/cpu/cortex-m3/io/stm32.h
index 38cf2d1c9f4e0cc6f308fc1896fe56f1148aa0ca..fabb0a3abd125e2a8d207414bfea1835363f404b 100644 (file)
--- a/bertos/cpu/cortex-m3/io/stm32.h
+++ b/bertos/cpu/cortex-m3/io/stm32.h
@@ -56,13 +56,18 @@
        #define GPIO_USART1_RX_PIN      BV(10)
        #define GPIO_USART2_TX_PIN      BV(2)
        #define GPIO_USART2_RX_PIN      BV(3)
-#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB
+#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB || CPU_CM3_STM32F102C4
        #define GPIO_USART1_TX_PIN      BV(9)
        #define GPIO_USART1_RX_PIN      BV(10)
        #define GPIO_USART2_TX_PIN      BV(2)
        #define GPIO_USART2_RX_PIN      BV(3)
        #define GPIO_USART3_TX_PIN      BV(10)
        #define GPIO_USART3_RX_PIN      BV(11)
+#if CPU_CM3_STM32F102C4        
+       #define GPIO_USART3_RTS_PIN     BV(14)
+       #define GPIO_USART3_CTS_PIN     BV(13)
+       #define GPIO_USART3_RING_PIN    BV(15)
+#endif
 #else
        #error No USART pins are defined for select cpu
 #endif
@@ -70,7 +75,7 @@
 #if CPU_CM3_STM32F101C4
        #define GPIO_I2C1_SCL_PIN       BV(6)
        #define GPIO_I2C1_SDA_PIN       BV(7)
-#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB
+#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB || CPU_CM3_STM32F102C4
        #define GPIO_I2C1_SCL_PIN       BV(6)
        #define GPIO_I2C1_SDA_PIN       BV(7)
        #define GPIO_I2C2_SCL_PIN       BV(10)
@@ -79,7 +84,7 @@
        #error No i2c pins are defined for select cpu
 #endif
 
-#if CPU_CM3_STM32F101C4 || CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB
+#if CPU_CM3_STM32F101C4 || CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB || CPU_CM3_STM32F102C4
        #define FLASH_PAGE_SIZE   1024
 #else
        #error No embedded definition for select cpu

diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h
index 401a1930a980b18d60f05d43655cb008974cf302..5c9438d28de4f9f42a6f131914a553520f08c90f 100644 (file)
--- a/bertos/cpu/detect.h
+++ b/bertos/cpu/detect.h
@@ -221,6 +221,14 @@
        #else
                #define CPU_CM3_STM32F101C4 0
        #endif
+       
+       #if defined (__ARM_STM32F102C4__)
+               #define CPU_CM3_STM32       1
+               #define CPU_CM3_STM32F102C4 1
+               #define CPU_NAME            "STM32F102C4"
+       #else
+               #define CPU_CM3_STM32F102C4 0
+       #endif  
 
        #if defined (__ARM_STM32F103RB__)
                #define CPU_CM3_STM32       1
@@ -303,7 +311,7 @@
                #define CPU_CM3_STM32       0
                #define CPU_CM3_SAM3        0
        #elif defined (CPU_CM3_STM32)
-               #if CPU_CM3_STM32F100RB + CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1
+               #if CPU_CM3_STM32F100RB + CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + CPU_CM3_STM32F102C4 + 0 != 1
                        #error STM32 Cortex-M3 CPU configuration error
                #endif
                #define CPU_CM3_LM3S        0