--- /dev/null
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2007 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $
+ *
+ * \author Daniele Basile <asterix@develer.com>
+ *
+ * \brief Script linker for Atmel AT91 SAM7S256 processors.
+ *
+ */
+
+
+ENTRY(_init)
+SEARCH_DIR(.)
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+/*
+ * Define memory configuration for AT91SAM7S
+ */
+MEMORY
+{
+ rom(rx) : org = 0x00100000, len = 256k
+ ram(rwx) : org = 0x00200000, len = 64k
+}
+
+
+/*
+ * Define stack size here
+ */
+FIQ_STACK_SIZE = 0x0100;
+IRQ_STACK_SIZE = 0x0100;
+ABT_STACK_SIZE = 0x0100;
+UND_STACK_SIZE = 0x0100;
+SVC_STACK_SIZE = 0x0400;
+
+/*
+ * Allocate section memory
+ */
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors));
+ . = ALIGN (4);
+ KEEP(*(.init));
+ . = ALIGN (4);
+ *(.rodata .rodata.*);
+ . = ALIGN (4);
+ *(.text .text.*);
+ . = ALIGN (4);
+ *(.glue_7t);
+ . = ALIGN(4);
+ *(.glue_7);
+ . = ALIGN(4);
+ } > ram
+
+ _etext = .;
+ PROVIDE (__etext = .);
+
+ .data : AT (__etext)
+ {
+ PROVIDE (__data_start = .);
+ *(.data .data.*)
+ . = ALIGN (4);
+ _edata = .;
+ PROVIDE (__data_end = .);
+ } > ram
+
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.bss .bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ PROVIDE (__bss_end = .);
+ } > ram
+
+ /*
+ * Allocated stack at the end of bss section.
+ * Data heap is allocate at end of stack.
+ */
+ PROVIDE (__stack_start = .);
+
+ PROVIDE (__stack_fiq_start = .);
+ . += FIQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_fiq_end = .);
+
+ PROVIDE (__stack_irq_start = .);
+ . += IRQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_irq_end = .);
+
+ PROVIDE (__stack_abt_start = .);
+ . += ABT_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_abt_end = .);
+
+ PROVIDE (__stack_und_start = .);
+ . += UND_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_und_end = .);
+
+ PROVIDE (__stack_svc_start = .);
+ . += SVC_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_svc_end = .);
+
+ PROVIDE (__stack_end = .);
+
+ PROVIDE (__heap_start = .);
+}
--- /dev/null
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2007 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $
+ *
+ * \author Daniele Basile <asterix@develer.com>
+ *
+ * \brief Script linker for Atmel AT91 SAM7S256 processors.
+ *
+ */
+
+
+ENTRY(_init)
+SEARCH_DIR(.)
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+/*
+ * Define memory configuration for AT91SAM7S
+ */
+MEMORY
+{
+ rom(rx) : org = 0x00100000, len = 256k
+ ram(rwx) : org = 0x00200000, len = 64k
+}
+
+
+/*
+ * Define stack size here
+ */
+FIQ_STACK_SIZE = 0x0100;
+IRQ_STACK_SIZE = 0x0100;
+ABT_STACK_SIZE = 0x0100;
+UND_STACK_SIZE = 0x0100;
+SVC_STACK_SIZE = 0x0400;
+
+/*
+ * Allocate section memory
+ */
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors));
+ . = ALIGN (4);
+ KEEP(*(.init));
+ . = ALIGN (4);
+ *(.rodata .rodata.*);
+ . = ALIGN (4);
+ *(.text .text.*);
+ . = ALIGN (4);
+ *(.glue_7t);
+ . = ALIGN(4);
+ *(.glue_7);
+ . = ALIGN(4);
+ } > rom
+
+ _etext = .;
+ PROVIDE (__etext = .);
+
+ .data : AT (__etext)
+ {
+ PROVIDE (__data_start = .);
+ *(.data .data.*)
+ . = ALIGN (4);
+ _edata = .;
+ PROVIDE (__data_end = .);
+ } > ram
+
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.bss .bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ PROVIDE (__bss_end = .);
+ } > ram
+
+ /*
+ * Allocated stack at the end of bss section.
+ * Data heap is allocate at end of stack.
+ */
+ PROVIDE (__stack_start = .);
+
+ PROVIDE (__stack_fiq_start = .);
+ . += FIQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_fiq_end = .);
+
+ PROVIDE (__stack_irq_start = .);
+ . += IRQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_irq_end = .);
+
+ PROVIDE (__stack_abt_start = .);
+ . += ABT_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_abt_end = .);
+
+ PROVIDE (__stack_und_start = .);
+ . += UND_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_und_end = .);
+
+ PROVIDE (__stack_svc_start = .);
+ . += SVC_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_svc_end = .);
+
+ PROVIDE (__stack_end = .);
+
+ PROVIDE (__heap_start = .);
+}
--- /dev/null
+target remote localhost:3333\r
+monitor reset\r
+monitor sleep 500\r
+monitor poll\r
+monitor soft_reset_halt\r
+monitor arm7_9 sw_bkpts enable\r
+#monitor arm7_9 force_hw_bkpts enable\r
+# WDT_MR, disable watchdog \r
+monitor mww 0xFFFFFD44 0x00008000\r
+\r
+# RSTC_MR, enable user reset\r
+monitor mww 0xfffffd08 0xa5000001\r
+\r
+# CKGR_MOR\r
+monitor mww 0xFFFFFC20 0x00000601\r
+monitor sleep 10\r
+\r
+# CKGR_PLLR\r
+monitor mww 0xFFFFFC2C 0x00481c0e\r
+monitor sleep 10\r
+\r
+# PMC_MCKR\r
+monitor mww 0xFFFFFC30 0x00000007\r
+monitor sleep 10\r
+\r
+# PMC_IER\r
+monitor mww 0xFFFFFF60 0x00480100\r
+monitor sleep 100\r
+\r
+#Remap RAM to address 0\r
+monitor mww 0xFFFFFF00 0x00000001\r
+monitor sleep 100\r
+\r
+break main\r
+load\r
+continue\r
--- /dev/null
+target remote localhost:3333\r
+monitor reset\r
+monitor sleep 500\r
+monitor poll\r
+monitor soft_reset_halt\r
+#monitor arm7_9 sw_bkpts enable\r
+monitor arm7_9 force_hw_bkpts enable\r
+# WDT_MR, disable watchdog \r
+monitor mww 0xFFFFFD44 0x00008000\r
+\r
+# RSTC_MR, enable user reset\r
+monitor mww 0xfffffd08 0xa5000001\r
+\r
+# CKGR_MOR\r
+monitor mww 0xFFFFFC20 0x00000601\r
+monitor sleep 10\r
+\r
+# CKGR_PLLR\r
+monitor mww 0xFFFFFC2C 0x00481c0e\r
+monitor sleep 10\r
+\r
+# PMC_MCKR\r
+monitor mww 0xFFFFFC30 0x00000007\r
+monitor sleep 10\r
+\r
+# PMC_IER\r
+monitor mww 0xFFFFFF60 0x00480100\r
+monitor sleep 100\r
+\r
+#Remap RAM to address 0\r
+#monitor mww 0xFFFFFF00 0x00000001\r
+#monitor sleep 100\r
+\r
+break main\r
+load\r
+continue\r
+++ /dev/null
-/**
- * \file
- * <!--
- * This file is part of BeRTOS.
- *
- * Bertos is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- *
- * As a special exception, you may use this file as part of a free software
- * library without restriction. Specifically, if other files instantiate
- * templates or use macros or inline functions from this file, or you compile
- * this file and link it with other files to produce an executable, this
- * file does not by itself cause the resulting executable to be covered by
- * the GNU General Public License. This exception does not however
- * invalidate any other reasons why the executable file might be covered by
- * the GNU General Public License.
- *
- * Copyright 2007 Develer S.r.l. (http://www.develer.com/)
- *
- * -->
- *
- * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $
- *
- * \author Daniele Basile <asterix@develer.com>
- *
- * \brief Script linker for Atmel AT91 SAM7S256 processors.
- *
- */
-
-
-ENTRY(_init)
-SEARCH_DIR(.)
-OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-
-/*
- * Define memory configuration for AT91SAM7S
- */
-MEMORY
-{
- rom(rx) : org = 0x00100000, len = 256k
- ram(rwx) : org = 0x00200000, len = 64k
-}
-
-
-/*
- * Define stack size here
- */
-FIQ_STACK_SIZE = 0x0100;
-IRQ_STACK_SIZE = 0x0100;
-ABT_STACK_SIZE = 0x0100;
-UND_STACK_SIZE = 0x0100;
-SVC_STACK_SIZE = 0x0400;
-
-/*
- * Allocate section memory
- */
-SECTIONS
-{
- .text :
- {
- KEEP(*(.vectors));
- . = ALIGN (4);
- KEEP(*(.init));
- . = ALIGN (4);
- *(.rodata .rodata.*);
- . = ALIGN (4);
- *(.text .text.*);
- . = ALIGN (4);
- *(.glue_7t);
- . = ALIGN(4);
- *(.glue_7);
- . = ALIGN(4);
- } > ram
-
- _etext = .;
- PROVIDE (__etext = .);
-
- .data : AT (__etext)
- {
- PROVIDE (__data_start = .);
- *(.data .data.*)
- . = ALIGN (4);
- _edata = .;
- PROVIDE (__data_end = .);
- } > ram
-
- .bss :
- {
- PROVIDE (__bss_start = .);
- *(.bss .bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE (__bss_end = .);
- } > ram
-
- /*
- * Allocated stack at the end of bss section.
- * Data heap is allocate at end of stack.
- */
- PROVIDE (__stack_start = .);
-
- PROVIDE (__stack_fiq_start = .);
- . += FIQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_fiq_end = .);
-
- PROVIDE (__stack_irq_start = .);
- . += IRQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_irq_end = .);
-
- PROVIDE (__stack_abt_start = .);
- . += ABT_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_abt_end = .);
-
- PROVIDE (__stack_und_start = .);
- . += UND_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_und_end = .);
-
- PROVIDE (__stack_svc_start = .);
- . += SVC_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_svc_end = .);
-
- PROVIDE (__stack_end = .);
-
- PROVIDE (__heap_start = .);
-}
+++ /dev/null
-/**
- * \file
- * <!--
- * This file is part of BeRTOS.
- *
- * Bertos is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- *
- * As a special exception, you may use this file as part of a free software
- * library without restriction. Specifically, if other files instantiate
- * templates or use macros or inline functions from this file, or you compile
- * this file and link it with other files to produce an executable, this
- * file does not by itself cause the resulting executable to be covered by
- * the GNU General Public License. This exception does not however
- * invalidate any other reasons why the executable file might be covered by
- * the GNU General Public License.
- *
- * Copyright 2007 Develer S.r.l. (http://www.develer.com/)
- *
- * -->
- *
- * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $
- *
- * \author Daniele Basile <asterix@develer.com>
- *
- * \brief Script linker for Atmel AT91 SAM7S256 processors.
- *
- */
-
-
-ENTRY(_init)
-SEARCH_DIR(.)
-OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-
-/*
- * Define memory configuration for AT91SAM7S
- */
-MEMORY
-{
- rom(rx) : org = 0x00100000, len = 256k
- ram(rwx) : org = 0x00200000, len = 64k
-}
-
-
-/*
- * Define stack size here
- */
-FIQ_STACK_SIZE = 0x0100;
-IRQ_STACK_SIZE = 0x0100;
-ABT_STACK_SIZE = 0x0100;
-UND_STACK_SIZE = 0x0100;
-SVC_STACK_SIZE = 0x0400;
-
-/*
- * Allocate section memory
- */
-SECTIONS
-{
- .text :
- {
- KEEP(*(.vectors));
- . = ALIGN (4);
- KEEP(*(.init));
- . = ALIGN (4);
- *(.rodata .rodata.*);
- . = ALIGN (4);
- *(.text .text.*);
- . = ALIGN (4);
- *(.glue_7t);
- . = ALIGN(4);
- *(.glue_7);
- . = ALIGN(4);
- } > rom
-
- _etext = .;
- PROVIDE (__etext = .);
-
- .data : AT (__etext)
- {
- PROVIDE (__data_start = .);
- *(.data .data.*)
- . = ALIGN (4);
- _edata = .;
- PROVIDE (__data_end = .);
- } > ram
-
- .bss :
- {
- PROVIDE (__bss_start = .);
- *(.bss .bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE (__bss_end = .);
- } > ram
-
- /*
- * Allocated stack at the end of bss section.
- * Data heap is allocate at end of stack.
- */
- PROVIDE (__stack_start = .);
-
- PROVIDE (__stack_fiq_start = .);
- . += FIQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_fiq_end = .);
-
- PROVIDE (__stack_irq_start = .);
- . += IRQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_irq_end = .);
-
- PROVIDE (__stack_abt_start = .);
- . += ABT_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_abt_end = .);
-
- PROVIDE (__stack_und_start = .);
- . += UND_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_und_end = .);
-
- PROVIDE (__stack_svc_start = .);
- . += SVC_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_svc_end = .);
-
- PROVIDE (__stack_end = .);
-
- PROVIDE (__heap_start = .);
-}
+++ /dev/null
-target remote localhost:3333\r
-monitor reset\r
-monitor sleep 500\r
-monitor poll\r
-monitor soft_reset_halt\r
-monitor arm7_9 sw_bkpts enable\r
-#monitor arm7_9 force_hw_bkpts enable\r
-# WDT_MR, disable watchdog \r
-monitor mww 0xFFFFFD44 0x00008000\r
-\r
-# RSTC_MR, enable user reset\r
-monitor mww 0xfffffd08 0xa5000001\r
-\r
-# CKGR_MOR\r
-monitor mww 0xFFFFFC20 0x00000601\r
-monitor sleep 10\r
-\r
-# CKGR_PLLR\r
-monitor mww 0xFFFFFC2C 0x00481c0e\r
-monitor sleep 10\r
-\r
-# PMC_MCKR\r
-monitor mww 0xFFFFFC30 0x00000007\r
-monitor sleep 10\r
-\r
-# PMC_IER\r
-monitor mww 0xFFFFFF60 0x00480100\r
-monitor sleep 100\r
-\r
-#Remap RAM to address 0\r
-monitor mww 0xFFFFFF00 0x00000001\r
-monitor sleep 100\r
-\r
-break main\r
-load\r
-continue\r
+++ /dev/null
-target remote localhost:3333\r
-monitor reset\r
-monitor sleep 500\r
-monitor poll\r
-monitor soft_reset_halt\r
-#monitor arm7_9 sw_bkpts enable\r
-monitor arm7_9 force_hw_bkpts enable\r
-# WDT_MR, disable watchdog \r
-monitor mww 0xFFFFFD44 0x00008000\r
-\r
-# RSTC_MR, enable user reset\r
-monitor mww 0xfffffd08 0xa5000001\r
-\r
-# CKGR_MOR\r
-monitor mww 0xFFFFFC20 0x00000601\r
-monitor sleep 10\r
-\r
-# CKGR_PLLR\r
-monitor mww 0xFFFFFC2C 0x00481c0e\r
-monitor sleep 10\r
-\r
-# PMC_MCKR\r
-monitor mww 0xFFFFFC30 0x00000007\r
-monitor sleep 10\r
-\r
-# PMC_IER\r
-monitor mww 0xFFFFFF60 0x00480100\r
-monitor sleep 100\r
-\r
-#Remap RAM to address 0\r
-#monitor mww 0xFFFFFF00 0x00000001\r
-#monitor sleep 100\r
-\r
-break main\r
-load\r
-continue\r
--- /dev/null
+# \r
+# The following command wills be executed on\r
+# reset (because of run_and_init in the config-file)\r
+# - halt target\r
+# - init ecr\r
+# - flash content of file main.bin into target-memory\r
+# - shutdown openocd\r
+#\r
+# created by Martin Thomas \r
+# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects\r
+# based on information from Dominic Rath \r
+#\r
+\r
+halt\r
+sleep 10\r
+\r
+# Init - taken form the script openocd_at91sam7_ecr.script \r
+mww 0xfffffd44 0x00008000 # disable watchdog\r
+mww 0xfffffd08 0xa5000001 # enable user reset\r
+mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
+sleep 10\r
+mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
+sleep 10\r
+mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
+sleep 10\r
+mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
+# arm7_9 force_hw_bkpts enable # program resides in flash\r
+\r
+# AT91SAM7 flash command-"batch"\r
+# adapted by Martin Thomas based on information from Dominic Rath - Thanks\r
+arm7_9 dcc_downloads enable\r
+sleep 10\r
+poll\r
+flash probe 0\r
+flash write 0 ../../../images/at91sam7s.bin 0x0\r
+reset run\r
+sleep 10\r
+#shutdown\r
--- /dev/null
+#\r
+# Flash AT91SAM7S memory using openocd \r
+# and a FTDI FT2232-based JTAG-interface\r
+#\r
+# created by Martin Thomas \r
+# based on information from Dominic Rath\r
+#\r
+\r
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 0\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config srst_only srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_init 0 arm7tdmi\r
+run_and_halt_time 0 30\r
+\r
+# flash-options AT91\r
+target_script 0 reset openocd_at91sam7s_reset.script\r
+working_area 0 0x00200000 0x10000 nobackup\r
+flash bank at91sam7 0 0 0 0 0\r
+\r
+# Information: \r
+# erase command (telnet-interface) for complete flash:\r
+# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
+# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
+# set/clear NVM-Bits:\r
+# at91sam7 gpnvm <num> <bit> <set|clear>\r
+# disable locking from SAM-BA\r
+# flash protect 0 0 1 off\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+#\r
+# Flash AT91SAM7S memory using openocd \r
+# and a FTDI FT2232-based JTAG-interface\r
+#\r
+# created by Martin Thomas \r
+# based on information from Dominic Rath\r
+#\r
+\r
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey A"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 0\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config srst_only srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_init 0 arm7tdmi\r
+run_and_halt_time 0 30\r
+\r
+# flash-options AT91\r
+target_script 0 reset openocd_at91sam7s_reset.script\r
+working_area 0 0x00200000 0x10000 nobackup\r
+flash bank at91sam7 0 0 0 0 0\r
+\r
+# Information: \r
+# erase command (telnet-interface) for complete flash:\r
+# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
+# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
+# set/clear NVM-Bits:\r
+# at91sam7 gpnvm <num> <bit> <set|clear>\r
+# disable locking from SAM-BA\r
+# flash protect 0 0 1 off\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+#\r
+# Flash AT91SAM7S memory using openocd \r
+# and a FTDI FT2232-based JTAG-interface\r
+#\r
+# created by Martin Thomas \r
+# based on information from Dominic Rath\r
+#\r
+\r
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 0\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config srst_only srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_init 0 arm7tdmi\r
+run_and_halt_time 0 30\r
+\r
+# flash-options AT91\r
+target_script 0 reset openocd_at91sam7s_flash.script\r
+working_area 0 0x00100000 0x40000 nobackup\r
+flash bank at91sam7 0 0 0 0 0\r
+\r
+# Information: \r
+# erase command (telnet-interface) for complete flash:\r
+# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
+# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
+# set/clear NVM-Bits:\r
+# at91sam7 gpnvm <num> <bit> <set|clear>\r
+# disable locking from SAM-BA\r
+# flash protect 0 0 1 off\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+#\r
+# Flash AT91SAM7S memory using openocd \r
+# and a FTDI FT2232-based JTAG-interface\r
+#\r
+# created by Martin Thomas \r
+# based on information from Dominic Rath\r
+#\r
+\r
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey A"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 0\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config srst_only srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_init 0 arm7tdmi\r
+run_and_halt_time 0 30\r
+\r
+# flash-options AT91\r
+target_script 0 reset openocd_at91sam7s_flash.script\r
+working_area 0 0x00100000 0x40000 nobackup\r
+flash bank at91sam7 0 0 0 0 0\r
+\r
+# Information: \r
+# erase command (telnet-interface) for complete flash:\r
+# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
+# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
+# set/clear NVM-Bits:\r
+# at91sam7 gpnvm <num> <bit> <set|clear>\r
+# disable locking from SAM-BA\r
+# flash protect 0 0 1 off\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+#\r
+# Init - taken form the script openocd_at91sam7_ecr.script \r
+#\r
+# I take this script from the following page:\r
+#\r
+# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html\r
+#\r
+mww 0xfffffd44 0x00008000 # disable watchdog\r
+mww 0xfffffd08 0xa5000001 # enable user reset\r
+mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
+sleep 10\r
+mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
+sleep 10\r
+mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
+sleep 10\r
+mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
+sleep 100\r
+++ /dev/null
-# \r
-# The following command wills be executed on\r
-# reset (because of run_and_init in the config-file)\r
-# - halt target\r
-# - init ecr\r
-# - flash content of file main.bin into target-memory\r
-# - shutdown openocd\r
-#\r
-# created by Martin Thomas \r
-# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects\r
-# based on information from Dominic Rath \r
-#\r
-\r
-halt\r
-sleep 10\r
-\r
-# Init - taken form the script openocd_at91sam7_ecr.script \r
-mww 0xfffffd44 0x00008000 # disable watchdog\r
-mww 0xfffffd08 0xa5000001 # enable user reset\r
-mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
-sleep 10\r
-mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
-sleep 10\r
-mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
-sleep 10\r
-mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
-# arm7_9 force_hw_bkpts enable # program resides in flash\r
-\r
-# AT91SAM7 flash command-"batch"\r
-# adapted by Martin Thomas based on information from Dominic Rath - Thanks\r
-arm7_9 dcc_downloads enable\r
-sleep 10\r
-poll\r
-flash probe 0\r
-flash write 0 ../../../images/at91sam7s.bin 0x0\r
-reset run\r
-sleep 10\r
-#shutdown\r
+++ /dev/null
-#\r
-# Flash AT91SAM7S memory using openocd \r
-# and a FTDI FT2232-based JTAG-interface\r
-#\r
-# created by Martin Thomas \r
-# based on information from Dominic Rath\r
-#\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Amontec JTAGkey"\r
-ft2232_layout jtagkey\r
-ft2232_vid_pid 0x0403 0xcff8\r
-jtag_speed 0\r
-jtag_nsrst_delay 200\r
-jtag_ntrst_delay 200\r
-\r
-#use combined on interfaces or targets that can't set TRST/SRST separately\r
-reset_config srst_only srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_init 0 arm7tdmi\r
-run_and_halt_time 0 30\r
-\r
-# flash-options AT91\r
-target_script 0 reset openocd_at91sam7s_reset.script\r
-working_area 0 0x00200000 0x10000 nobackup\r
-flash bank at91sam7 0 0 0 0 0\r
-\r
-# Information: \r
-# erase command (telnet-interface) for complete flash:\r
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
-# set/clear NVM-Bits:\r
-# at91sam7 gpnvm <num> <bit> <set|clear>\r
-# disable locking from SAM-BA\r
-# flash protect 0 0 1 off\r
-\r
-# For more information about the configuration files, take a look at:\r
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
+++ /dev/null
-#\r
-# Flash AT91SAM7S memory using openocd \r
-# and a FTDI FT2232-based JTAG-interface\r
-#\r
-# created by Martin Thomas \r
-# based on information from Dominic Rath\r
-#\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Amontec JTAGkey A"\r
-ft2232_layout jtagkey\r
-ft2232_vid_pid 0x0403 0xcff8\r
-jtag_speed 0\r
-jtag_nsrst_delay 200\r
-jtag_ntrst_delay 200\r
-\r
-#use combined on interfaces or targets that can't set TRST/SRST separately\r
-reset_config srst_only srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_init 0 arm7tdmi\r
-run_and_halt_time 0 30\r
-\r
-# flash-options AT91\r
-target_script 0 reset openocd_at91sam7s_reset.script\r
-working_area 0 0x00200000 0x10000 nobackup\r
-flash bank at91sam7 0 0 0 0 0\r
-\r
-# Information: \r
-# erase command (telnet-interface) for complete flash:\r
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
-# set/clear NVM-Bits:\r
-# at91sam7 gpnvm <num> <bit> <set|clear>\r
-# disable locking from SAM-BA\r
-# flash protect 0 0 1 off\r
-\r
-# For more information about the configuration files, take a look at:\r
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
+++ /dev/null
-#\r
-# Flash AT91SAM7S memory using openocd \r
-# and a FTDI FT2232-based JTAG-interface\r
-#\r
-# created by Martin Thomas \r
-# based on information from Dominic Rath\r
-#\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Amontec JTAGkey"\r
-ft2232_layout jtagkey\r
-ft2232_vid_pid 0x0403 0xcff8\r
-jtag_speed 0\r
-jtag_nsrst_delay 200\r
-jtag_ntrst_delay 200\r
-\r
-#use combined on interfaces or targets that can't set TRST/SRST separately\r
-reset_config srst_only srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_init 0 arm7tdmi\r
-run_and_halt_time 0 30\r
-\r
-# flash-options AT91\r
-target_script 0 reset openocd_at91sam7s_flash.script\r
-working_area 0 0x00100000 0x40000 nobackup\r
-flash bank at91sam7 0 0 0 0 0\r
-\r
-# Information: \r
-# erase command (telnet-interface) for complete flash:\r
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
-# set/clear NVM-Bits:\r
-# at91sam7 gpnvm <num> <bit> <set|clear>\r
-# disable locking from SAM-BA\r
-# flash protect 0 0 1 off\r
-\r
-# For more information about the configuration files, take a look at:\r
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
+++ /dev/null
-#\r
-# Flash AT91SAM7S memory using openocd \r
-# and a FTDI FT2232-based JTAG-interface\r
-#\r
-# created by Martin Thomas \r
-# based on information from Dominic Rath\r
-#\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Amontec JTAGkey A"\r
-ft2232_layout jtagkey\r
-ft2232_vid_pid 0x0403 0xcff8\r
-jtag_speed 0\r
-jtag_nsrst_delay 200\r
-jtag_ntrst_delay 200\r
-\r
-#use combined on interfaces or targets that can't set TRST/SRST separately\r
-reset_config srst_only srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_init 0 arm7tdmi\r
-run_and_halt_time 0 30\r
-\r
-# flash-options AT91\r
-target_script 0 reset openocd_at91sam7s_flash.script\r
-working_area 0 0x00100000 0x40000 nobackup\r
-flash bank at91sam7 0 0 0 0 0\r
-\r
-# Information: \r
-# erase command (telnet-interface) for complete flash:\r
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
-# set/clear NVM-Bits:\r
-# at91sam7 gpnvm <num> <bit> <set|clear>\r
-# disable locking from SAM-BA\r
-# flash protect 0 0 1 off\r
-\r
-# For more information about the configuration files, take a look at:\r
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
+++ /dev/null
-#\r
-# Init - taken form the script openocd_at91sam7_ecr.script \r
-#\r
-# I take this script from the following page:\r
-#\r
-# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html\r
-#\r
-mww 0xfffffd44 0x00008000 # disable watchdog\r
-mww 0xfffffd08 0xa5000001 # enable user reset\r
-mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
-sleep 10\r
-mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
-sleep 10\r
-mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
-sleep 10\r
-mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
-sleep 100\r
projects / bertos.git / commitdiff