/**
* Size of the outbound FIFO buffer for port 0 [bytes].
* $WIZ$ type = "int"
/**
* Size of the outbound FIFO buffer for port 0 [bytes].
* $WIZ$ type = "int"
*/
#define CONFIG_UART0_TXBUFSIZE 32
/**
* Size of the inbound FIFO buffer for port 0 [bytes].
* $WIZ$ type = "int"
*/
#define CONFIG_UART0_TXBUFSIZE 32
/**
* Size of the inbound FIFO buffer for port 0 [bytes].
* $WIZ$ type = "int"
*/
#define CONFIG_UART0_RXBUFSIZE 32
/**
* Size of the outbound FIFO buffer for port 1 [bytes].
* $WIZ$ type = "int"
*/
#define CONFIG_UART0_RXBUFSIZE 32
/**
* Size of the outbound FIFO buffer for port 1 [bytes].
* $WIZ$ type = "int"
* $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32"
*/
#define CONFIG_UART1_TXBUFSIZE 32
* $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32"
*/
#define CONFIG_UART1_TXBUFSIZE 32
/**
* Size of the inbound FIFO buffer for port 1 [bytes].
* $WIZ$ type = "int"
/**
* Size of the inbound FIFO buffer for port 1 [bytes].
* $WIZ$ type = "int"
* $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32"
*/
#define CONFIG_UART1_RXBUFSIZE 32
/**
* $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32"
*/
#define CONFIG_UART1_RXBUFSIZE 32
/**
- * [bytes] Size of the outbound FIFO buffer for SPI port.
+ * Size of the outbound FIFO buffer for SPI port [bytes].
* $WIZ$ supports = "avr"
*/
#define CONFIG_SPI_TXBUFSIZE 32
/**
* $WIZ$ supports = "avr"
*/
#define CONFIG_SPI_TXBUFSIZE 32
/**
- * [bytes] Size of the inbound FIFO buffer for SPI port.
+ * Size of the inbound FIFO buffer for SPI port [bytes].
* $WIZ$ supports = "avr"
*/
#define CONFIG_SPI_RXBUFSIZE 32
* $WIZ$ supports = "avr"
*/
#define CONFIG_SPI_RXBUFSIZE 32
/**
* Size of the outbound FIFO buffer for SPI port 0 [bytes].
* $WIZ$ type = "int"
/**
* Size of the outbound FIFO buffer for SPI port 0 [bytes].
* $WIZ$ type = "int"
* $WIZ$ supports = "at91"
*/
#define CONFIG_SPI0_TXBUFSIZE 32
* $WIZ$ supports = "at91"
*/
#define CONFIG_SPI0_TXBUFSIZE 32
/**
* Size of the inbound FIFO buffer for SPI port 0 [bytes].
* $WIZ$ type = "int"
/**
* Size of the inbound FIFO buffer for SPI port 0 [bytes].
* $WIZ$ type = "int"
* $WIZ$ supports = "at91"
*/
#define CONFIG_SPI0_RXBUFSIZE 32
* $WIZ$ supports = "at91"
*/
#define CONFIG_SPI0_RXBUFSIZE 32
/**
* Size of the outbound FIFO buffer for SPI port 1 [bytes].
* $WIZ$ type = "int"
/**
* Size of the outbound FIFO buffer for SPI port 1 [bytes].
* $WIZ$ type = "int"
* $WIZ$ supports = "at91"
*/
#define CONFIG_SPI1_TXBUFSIZE 32
* $WIZ$ supports = "at91"
*/
#define CONFIG_SPI1_TXBUFSIZE 32
/**
* Size of the inbound FIFO buffer for SPI port 1 [bytes].
* $WIZ$ type = "int"
/**
* Size of the inbound FIFO buffer for SPI port 1 [bytes].
* $WIZ$ type = "int"
* $WIZ$ supports = "at91"
*/
#define CONFIG_SPI1_RXBUFSIZE 32
* $WIZ$ supports = "at91"
*/
#define CONFIG_SPI1_RXBUFSIZE 32
/**
* Default transmit timeout (ms). Set to -1 to disable timeout support.
* $WIZ$ type = "int"
/**
* Default transmit timeout (ms). Set to -1 to disable timeout support.
* $WIZ$ type = "int"
*/
#define CONFIG_SER_TXTIMEOUT -1
/**
* Default receive timeout (ms). Set to -1 to disable timeout support.
* $WIZ$ type = "int"
*/
#define CONFIG_SER_TXTIMEOUT -1
/**
* Default receive timeout (ms). Set to -1 to disable timeout support.
* $WIZ$ type = "int"
*/
#define CONFIG_SER_RXTIMEOUT -1
*/
#define CONFIG_SER_RXTIMEOUT -1
#define CONFIG_SER_HWHANDSHAKE 0
/**
#define CONFIG_SER_HWHANDSHAKE 0
/**
- * Default baud rate for all serial ports (set to 0 to disable).
+ * Default baudrate for all serial ports (set to 0 to disable).
*/
#define CONFIG_SER_DEFBAUDRATE 0UL
*/
#define CONFIG_SER_DEFBAUDRATE 0UL