Use different api name for new i2c interface. Comply all driver.
authorasterix <asterix@38d2e660-2303-0410-9eaa-f027e97ec537>
Thu, 29 Jul 2010 14:21:18 +0000 (14:21 +0000)
committerasterix <asterix@38d2e660-2303-0410-9eaa-f027e97ec537>
Thu, 29 Jul 2010 14:21:18 +0000 (14:21 +0000)
git-svn-id: https://src.develer.com/svnoss/bertos/branches/i2c@4089 38d2e660-2303-0410-9eaa-f027e97ec537

bertos/cpu/arm/drv/i2c_lpc2.c
bertos/cpu/avr/drv/i2c_avr.c
bertos/cpu/cortex-m3/drv/i2c_lm3s.c
bertos/cpu/cortex-m3/drv/i2c_stm32.c
bertos/drv/i2c.c
bertos/drv/i2c.h

index ad400619772ff5623224a42465f778b40de17c06..a687e1a92c0f7b72bfb0cebbeddea8a96c13a51d 100644 (file)
@@ -106,7 +106,7 @@ static void i2c_hw_stop(I2c *i2c)
        HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
 }
 
-static void i2c_lpc2_put(I2c *i2c, uint8_t data)
+static void i2c_lpc2_putc(I2c *i2c, uint8_t data)
 {
        HWREG(i2c->hw->base + I2C_DAT_OFF) = data;
        HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
@@ -137,7 +137,7 @@ static void i2c_lpc2_put(I2c *i2c, uint8_t data)
        }
 }
 
-static uint8_t i2c_lpc2_get(I2c *i2c)
+static uint8_t i2c_lpc2_getc(I2c *i2c)
 {
        /*
         * Set ack bit if we want read more byte, otherwise
@@ -259,10 +259,10 @@ static void i2c_lpc2_start(struct I2c *i2c, uint16_t slave_addr)
 static const I2cVT i2c_lpc_vt =
 {
        .start = i2c_lpc2_start,
-       .get = i2c_lpc2_get,
-       .put = i2c_lpc2_put,
-       .send = i2c_swSend,
-       .recv = i2c_swRecv,
+       .getc = i2c_lpc2_getc,
+       .putc = i2c_lpc2_putc,
+       .write = i2c_genericWrite,
+       .read = i2c_genericRead,
 };
 
 struct I2cHardware i2c_lpc2_hw[] =
index d131d635999e8b60c22ed6866c2061e7fa0409e1..739e4ab371c3205722956b154f6972a00aaa8a3f 100644 (file)
 #include <drv/timer.h>
 #include <drv/i2c.h>
 
-#include <compat/twi.h>
-
+#include <cpu/power.h>
 
-struct I2cHardware
-{
-};
+#include <compat/twi.h>
 
 
 /* Wait for TWINT flag set: bus is ready */
@@ -211,61 +208,217 @@ int i2c_builtin_get(bool ack)
 }
 
 
+MOD_DEFINE(i2c);
+
+/**
+ * Initialize TWI module.
+ */
+void i2c_builtin_init(void)
+{
+       ATOMIC(
+               /*
+                * This is pretty useless according to AVR's datasheet,
+                * but it helps us driving the TWI data lines on boards
+                * where the bus pull-up resistors are missing.  This is
+                * probably due to some unwanted interaction between the
+                * port pin and the TWI lines.
+                */
+#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
+               PORTD |= BV(PD0) | BV(PD1);
+               DDRD  |= BV(PD0) | BV(PD1);
+#elif CPU_AVR_ATMEGA8
+               PORTC |= BV(PC4) | BV(PC5);
+               DDRC  |= BV(PC4) | BV(PC5);
+#elif CPU_AVR_ATMEGA32
+               PORTC |= BV(PC1) | BV(PC0);
+               DDRC  |= BV(PC1) | BV(PC0);
+#else
+               #error Unsupported architecture
+#endif
+
+               /*
+                * Set speed:
+                * F = CPU_FREQ / (16 + 2*TWBR * 4^TWPS)
+                */
+               #ifndef CONFIG_I2C_FREQ
+                       #warning Using default value of 300000L for CONFIG_I2C_FREQ
+                       #define CONFIG_I2C_FREQ  300000L /* ~300 kHz */
+               #endif
+               #define TWI_PRESC 1       /* 4 ^ TWPS */
+
+               TWBR = (CPU_FREQ / (2 * CONFIG_I2C_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);
+               TWSR = 0;
+               TWCR = BV(TWEN);
+       );
+       MOD_INIT(i2c);
+}
+
+/*
+ * New Api
+ */
+
+
+struct I2cHardware
+{
+};
+
+
+/* Wait for TWINT flag set: bus is ready */
+#define WAIT_READY() \
+       do { \
+               while (!(TWCR & BV(TWINT))) \
+                       cpu_relax(); \
+       } while (0)
+
+/**
+ * Send START condition on the bus.
+ */
+INLINE bool i2c_hw_start(void)
+{
+       TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
+       WAIT_READY();
+
+       if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
+               return true;
+
+       return false;
+}
+
+/**
+ * Send STOP condition.
+ */
+INLINE void i2c_hw_stop(void)
+{
+       TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
+}
 
-static void i2c_avr_start(struct I2c *i2c, uint16_t slave_addr)
+static void i2c_avr_start(I2c *i2c, uint16_t slave_addr)
 {
-       if (I2C_TEST_START(i2c->flags) == I2C_START_W)
+       /*
+        * Loop on the select write sequence: when the eeprom is busy
+        * writing previously sent data it will reply to the SLA_W
+        * control byte with a NACK.  In this case, we must
+        * keep trying until the slave responds with an ACK.
+        */
+       ticks_t start = timer_clock();
+       while (i2c_hw_start())
        {
-               if (i2c_builtin_start_w(slave_addr))
+               uint8_t sla_ack = 0;
+               uint8_t sla_nack = 0;
+               if (I2C_TEST_START(i2c->flags) == I2C_START_W)
                {
-                       LOG_ERR("Start timeout\n");
-                       i2c->errors |= I2C_START_TIMEOUT;
+                       TWDR = slave_addr & ~I2C_READBIT;
+                       sla_ack = TW_MT_SLA_ACK;
+                       sla_nack = TW_MT_SLA_NACK;
                }
-       }
-       else /* (I2C_TEST_START(i2c->flags) == I2C_START_R) */
-       {
-               if (i2c_builtin_start_r(slave_addr))
+               else
+               {
+                       TWDR = slave_addr | I2C_READBIT;
+                       sla_ack = TW_MR_SLA_ACK;
+                       sla_nack = TW_MR_SLA_NACK;
+               }
+
+               TWCR = BV(TWINT) | BV(TWEN);
+               WAIT_READY();
+
+               if (TW_STATUS == sla_ack)
+                       return;
+               else if (TW_STATUS != sla_nack)
                {
-                       LOG_ERR("Start r no ACK\n");
+                       LOG_ERR("Start addr NACK[%x]\n", TWSR);
                        i2c->errors |= I2C_NO_ACK;
+                       i2c_hw_stop();
+                       break;
+               }
+               else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
+               {
+                       LOG_ERR("Start timeout\n");
+                       i2c->errors |= I2C_START_TIMEOUT;
+                       i2c_hw_stop();
+                       break;
                }
        }
+
+       LOG_ERR("I2c error\n");
+       i2c->errors |= I2C_ERR;
+       i2c_hw_stop();
 }
 
-static void i2c_avr_put(I2c *i2c, const uint8_t data)
+static void i2c_avr_putc(I2c *i2c, const uint8_t data)
 {
-       if (i2c_builtin_put(data))
+
+       TWDR = data;
+       TWCR = BV(TWINT) | BV(TWEN);
+       WAIT_READY();
+
+       if (TW_STATUS != TW_MT_DATA_ACK)
        {
-               LOG_ERR("Start r no ACK\n");
+               LOG_ERR("Data nack[%x]\n", TWSR);
                i2c->errors |= I2C_DATA_NACK;
+               i2c_hw_stop();
        }
 
        if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
-               i2c_bitbang_stop();
+               i2c_hw_stop();
 }
 
-static uint8_t i2c_avr_get(I2c *i2c)
+static uint8_t i2c_avr_getc(I2c *i2c)
 {
-       bool ack = true;
+       uint8_t data_flag = 0;
        if (i2c->xfer_size == 1)
-               ack = false;
+       {
+               TWCR = BV(TWINT) | BV(TWEN);
+               data_flag = TW_MR_DATA_NACK;
+       }
+       else
+       {
+               TWCR = BV(TWINT) | BV(TWEN) | BV(TWEA);
+               data_flag = TW_MR_DATA_ACK;
+       }
+
+       WAIT_READY();
+
+       if (TW_STATUS != TW_MR_DATA_ACK)
+       {
+               LOG_ERR("Data nack[%x]\n", TWSR);
+               i2c->errors |= I2C_DATA_NACK;
+               i2c_hw_stop();
 
-       uint8_t data = i2c_builtin_get(ack);
+               return 0xFF;
+       }
+
+       uint8_t data = TWDR;
 
        if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
-               i2c_bitbang_stop();
+               i2c_hw_stop();
 
        return data;
 }
 
 
-MOD_DEFINE(i2c);
+static const I2cVT i2c_avr_vt =
+{
+       .start = i2c_avr_start,
+       .getc = i2c_avr_getc,
+       .putc = i2c_avr_putc,
+       .write = i2c_genericWrite,
+       .read = i2c_genericRead,
+};
+
+struct I2cHardware i2c_avr_hw[] =
+{
+       { /* I2C0 */
+       },
+};
 
 /**
- * Initialize TWI module.
+ * Initialize I2C module.
  */
-INLINE void i2c_avr_init(uint32_t clock)
+void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
 {
+       i2c->hw = &i2c_avr_hw[dev];
+       i2c->vt = &i2c_avr_vt;
+
        ATOMIC(
                /*
                 * This is pretty useless according to AVR's datasheet,
@@ -274,62 +427,30 @@ INLINE void i2c_avr_init(uint32_t clock)
                 * probably due to some unwanted interaction between the
                 * port pin and the TWI lines.
                 */
-#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
+       #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
                PORTD |= BV(PD0) | BV(PD1);
                DDRD  |= BV(PD0) | BV(PD1);
-#elif CPU_AVR_ATMEGA8
+       #elif CPU_AVR_ATMEGA8
                PORTC |= BV(PC4) | BV(PC5);
                DDRC  |= BV(PC4) | BV(PC5);
-#elif CPU_AVR_ATMEGA32
+       #elif CPU_AVR_ATMEGA32
                PORTC |= BV(PC1) | BV(PC0);
                DDRC  |= BV(PC1) | BV(PC0);
-#else
+       #else
                #error Unsupported architecture
-#endif
+       #endif
 
                /*
                 * Set speed:
                 * F = CPU_FREQ / (16 + 2*TWBR * 4^TWPS)
                 */
                ASSERT(clock);
-               #define TWI_PRESC   1       /* 4 ^ TWPS */
+               #define TWI_PRESC    1       /* 4 ^ TWPS */
 
                TWBR = (CPU_FREQ / (2 * clock * TWI_PRESC)) - (8 / TWI_PRESC);
                TWSR = 0;
                TWCR = BV(TWEN);
        );
-       MOD_INIT(i2c);
-}
-
-
-static const I2cVT i2c_lm3s_vt =
-{
-       .start = i2c_avr_start,
-       .get = i2c_avr_get,
-       .put = i2c_avr_put,
-       .send = i2c_swSend,
-       .recv = i2c_swRecv,
-};
 
-struct I2cHardware i2c_avr_hw[] =
-{
-       { /* I2C0 */
-       },
-};
-
-/**
- * Initialize I2C module.
- */
-void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
-{
-       i2c->hw = &i2c_avr_hw[dev];
-       i2c->vt = &i2c_avr_vt;
-
-       i2c_avr_init(clock);
-}
-
-void i2c_bitbang_init(void)
-{
-       i2c_avr_init(CONFIG_I2C_FREQ);
+       MOD_INIT(i2c);
 }
-
index afc6a60b2947ee4ad8f74e73fd5c279b0dd16cd8..af3f6a8a9d516cd48b46c28b293e19ea032db9be 100644 (file)
@@ -118,7 +118,7 @@ INLINE bool wait_addrAck(I2c *i2c, uint32_t mode_mask)
        return true;
 }
 
-static void i2c_lm3s_put(I2c *i2c, const uint8_t data)
+static void i2c_lm3s_putc(I2c *i2c, const uint8_t data)
 {
        HWREG(i2c->hw->base + I2C_O_MDR) = data;
 
@@ -151,7 +151,7 @@ static void i2c_lm3s_put(I2c *i2c, const uint8_t data)
        }
 }
 
-static uint8_t i2c_lm3s_get(I2c *i2c)
+static uint8_t i2c_lm3s_getc(I2c *i2c)
 {
        uint8_t data;
        if (i2c->hw->first_xtranf)
@@ -200,10 +200,10 @@ MOD_DEFINE(i2c);
 static const I2cVT i2c_lm3s_vt =
 {
        .start = i2c_lm3s_start,
-       .get = i2c_lm3s_get,
-       .put = i2c_lm3s_put,
-       .send = i2c_swSend,
-       .recv = i2c_swRecv,
+       .getc = i2c_lm3s_getc,
+       .putc = i2c_lm3s_putc,
+       .write = i2c_genericWrite,
+       .read = i2c_genericRead,
 };
 
 struct I2cHardware i2c_lm3s_hw[] =
index 24c3e185a437067d27db742ce5938cd1b329ae3e..97c491abd0234a006f27a51474230f276d4bf598 100644 (file)
@@ -237,7 +237,7 @@ static void i2c_stm32_start(struct I2c *i2c, uint16_t slave_addr)
                start_r(i2c, slave_addr);
 }
 
-static void i2c_stm32_put(I2c *i2c, const uint8_t data)
+static void i2c_stm32_putc(I2c *i2c, const uint8_t data)
 {
        i2c->hw->base->DR = data;
 
@@ -251,7 +251,7 @@ static void i2c_stm32_put(I2c *i2c, const uint8_t data)
        }
 }
 
-static uint8_t i2c_stm32_get(I2c *i2c)
+static uint8_t i2c_stm32_getc(I2c *i2c)
 {
        if (i2c->hw->cached)
        {
@@ -297,10 +297,10 @@ static uint8_t i2c_stm32_get(I2c *i2c)
 static const I2cVT i2c_stm32_vt =
 {
        .start = i2c_stm32_start,
-       .get = i2c_stm32_get,
-       .put = i2c_stm32_put,
-       .send = i2c_swSend,
-       .recv = i2c_swRecv,
+       .getc = i2c_stm32_getc,
+       .putc = i2c_stm32_putc,
+       .write = i2c_genericWrite,
+       .read = i2c_genericRead,
 };
 
 struct I2cHardware i2c_stm32_hw[] =
index af3eabbb06055f5154fdcb6cad241068b8129133..e54c921ee2c52cf2b53024d31bcaa47f78f04bf5 100644 (file)
@@ -89,20 +89,19 @@ bool i2c_recv(void *_buf, size_t count)
 }
 
 
-void i2c_swSend(struct I2c *i2c, const void *_buf, size_t count)
+void i2c_genericWrite(struct I2c *i2c, const void *_buf, size_t count)
 {
        const uint8_t *buf = (const uint8_t *)_buf;
 
        while (count--)
-               i2c_put(i2c, *buf++);
+               i2c_putc(i2c, *buf++);
 }
 
-void i2c_swRecv(struct I2c *i2c, void *_buf, size_t count)
+void i2c_genericRead(struct I2c *i2c, void *_buf, size_t count)
 {
        uint8_t *buf = (uint8_t *)_buf;
 
        while (count--)
-               *buf++ = i2c_get(i2c);
+               *buf++ = i2c_getc(i2c);
 }
 
-
index bfbf8ba052d84b8319ee4b960a1cfb594637b116..c7fa9587f8aa960767a375c059c53b23af41f54d 100644 (file)
 #define I2C_READBIT BV(0)
 
 #if COMPILER_C99
-       #define i2c_init(...)     PP_CAT(i2c_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
+       #define i2c_init(...)           PP_CAT(i2c_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
+       #define i2c_start_w(...)        PP_CAT(i2c_start_w ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
+       #define i2c_start_r(...)        PP_CAT(i2c_start_r ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
 #else
-       #define i2c_init(args...)     PP_CAT(i2c_init ## _, COUNT_PARMS(args)) (args)
+       #define i2c_init(args...)       PP_CAT(i2c_init ## _, COUNT_PARMS(args)) (args)
+       #define i2c_start_w(args...)    PP_CAT(i2c_start_w ## _, COUNT_PARMS(args)) (args)
+       #define i2c_start_r(args...)    PP_CAT(i2c_start_r ## _, COUNT_PARMS(args)) (args)
 #endif
 
 /**
@@ -71,8 +75,6 @@
 #define I2C_BACKEND_BUILTIN 0 ///< Uses cpu builtin i2c driver
 #define I2C_BACKEND_BITBANG 1 ///< Uses emulated bitbang driver
 
-#if 0
-
 /**
  * I2c builtin prototypes.
  * Do NOT use these function directly, instead,
@@ -106,19 +108,19 @@ int i2c_bitbang_get(bool ack);
 /*\}*/
 
 #if CONFIG_I2C_BACKEND == I2C_BACKEND_BUILTIN
-       #define i2c_init_0    i2c_builtin_init
-       #define i2c_start_w   i2c_builtin_start_w
-       #define i2c_start_r   i2c_builtin_start_r
-       #define i2c_stop      i2c_builtin_stop
-       #define i2c_put       i2c_builtin_put
-       #define i2c_get       i2c_builtin_get
+       #define i2c_init_0      i2c_builtin_init
+       #define i2c_start_w_1   i2c_builtin_start_w
+       #define i2c_start_r_1   i2c_builtin_start_r
+       #define i2c_stop        i2c_builtin_stop
+       #define i2c_put         i2c_builtin_put
+       #define i2c_get         i2c_builtin_get
 #elif CONFIG_I2C_BACKEND == I2C_BACKEND_BITBANG
-       #define i2c_init_0    i2c_bitbang_init
-       #define i2c_start_w   i2c_bitbang_start_w
-       #define i2c_start_r   i2c_bitbang_start_r
-       #define i2c_stop      i2c_bitbang_stop
-       #define i2c_put       i2c_bitbang_put
-       #define i2c_get       i2c_bitbang_get
+       #define i2c_init_0      i2c_bitbang_init
+       #define i2c_start_w_1   i2c_bitbang_start_w
+       #define i2c_start_r_1   i2c_bitbang_start_r
+       #define i2c_stop        i2c_bitbang_stop
+       #define i2c_put         i2c_bitbang_put
+       #define i2c_get         i2c_bitbang_get
 #else
        #error Unsupported i2c backend.
 #endif
@@ -127,7 +129,6 @@ int i2c_bitbang_get(bool ack);
 bool i2c_send(const void *_buf, size_t count);
 bool i2c_recv(void *_buf, size_t count);
 
-#endif
 
 /*
  * I2c new api
@@ -159,18 +160,18 @@ struct I2cHardware;
 struct I2c;
 
 typedef void (*i2c_start_t)(struct I2c *i2c, uint16_t slave_addr);
-typedef uint8_t (*i2c_get_t)(struct I2c *i2c);
-typedef void (*i2c_put_t)(struct I2c *i2c, uint8_t data);
-typedef void (*i2c_send_t)(struct I2c *i2c, const void *_buf, size_t count);
-typedef void (*i2c_recv_t)(struct I2c *i2c, void *_buf, size_t count);
+typedef uint8_t (*i2c_getc_t)(struct I2c *i2c);
+typedef void (*i2c_putc_t)(struct I2c *i2c, uint8_t data);
+typedef void (*i2c_write_t)(struct I2c *i2c, const void *_buf, size_t count);
+typedef void (*i2c_read_t)(struct I2c *i2c, void *_buf, size_t count);
 
 typedef struct I2cVT
 {
        i2c_start_t start;
-       i2c_get_t   get;
-       i2c_put_t   put;
-       i2c_send_t  send;
-       i2c_recv_t  recv;
+       i2c_getc_t   getc;
+       i2c_putc_t   putc;
+       i2c_write_t  write;
+       i2c_read_t   read;
 } I2cVT;
 
 typedef struct I2c
@@ -190,8 +191,8 @@ typedef struct I2c
  */
 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock);
 
-void i2c_swSend(struct I2c *i2c, const void *_buf, size_t count);
-void i2c_swRecv(struct I2c *i2c, void *_buf, size_t count);
+void i2c_genericWrite(I2c *i2c, const void *_buf, size_t count);
+void i2c_genericRead(I2c *i2c, void *_buf, size_t count);
 
 INLINE void i2c_start(I2c *i2c, uint16_t slave_addr, size_t size)
 {
@@ -207,25 +208,25 @@ INLINE void i2c_start(I2c *i2c, uint16_t slave_addr, size_t size)
        i2c->vt->start(i2c, slave_addr);
 }
 
-INLINE void i2c_start_r(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
+INLINE void i2c_start_r_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
 {
        ASSERT(i2c);
        i2c->flags = flags | I2C_START_R;
        i2c_start(i2c, slave_addr, size);
 }
 
-INLINE void i2c_start_w(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
+INLINE void i2c_start_w_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
 {
        ASSERT(i2c);
        i2c->flags = flags & ~I2C_START_R;
        i2c_start(i2c, slave_addr, size);
 }
 
-INLINE uint8_t i2c_get(I2c *i2c)
+INLINE uint8_t i2c_getc(I2c *i2c)
 {
        ASSERT(i2c);
        ASSERT(i2c->vt);
-       ASSERT(i2c->vt->get);
+       ASSERT(i2c->vt->getc);
 
        ASSERT(i2c->xfer_size);
 
@@ -233,7 +234,7 @@ INLINE uint8_t i2c_get(I2c *i2c)
 
        if (!i2c->errors)
        {
-               uint8_t data = i2c->vt->get(i2c);
+               uint8_t data = i2c->vt->getc(i2c);
                i2c->xfer_size--;
                return data;
        }
@@ -241,11 +242,11 @@ INLINE uint8_t i2c_get(I2c *i2c)
                return 0xFF;
 }
 
-INLINE void i2c_put(I2c *i2c, uint8_t data)
+INLINE void i2c_putc(I2c *i2c, uint8_t data)
 {
        ASSERT(i2c);
        ASSERT(i2c->vt);
-       ASSERT(i2c->vt->put);
+       ASSERT(i2c->vt->putc);
 
        ASSERT(i2c->xfer_size);
 
@@ -253,16 +254,16 @@ INLINE void i2c_put(I2c *i2c, uint8_t data)
 
        if (!i2c->errors)
        {
-               i2c->vt->put(i2c, data);
+               i2c->vt->putc(i2c, data);
                i2c->xfer_size--;
        }
 }
 
-INLINE void i2c_send(I2c *i2c, const void *_buf, size_t count)
+INLINE void i2c_write(I2c *i2c, const void *_buf, size_t count)
 {
        ASSERT(i2c);
        ASSERT(i2c->vt);
-       ASSERT(i2c->vt->send);
+       ASSERT(i2c->vt->write);
 
        ASSERT(_buf);
        ASSERT(count);
@@ -271,15 +272,15 @@ INLINE void i2c_send(I2c *i2c, const void *_buf, size_t count)
        ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_W);
 
        if (!i2c->errors)
-               i2c->vt->send(i2c, _buf, count);
+               i2c->vt->write(i2c, _buf, count);
 }
 
 
-INLINE void i2c_recv(I2c *i2c, void *_buf, size_t count)
+INLINE void i2c_read(I2c *i2c, void *_buf, size_t count)
 {
        ASSERT(i2c);
        ASSERT(i2c->vt);
-       ASSERT(i2c->vt->recv);
+       ASSERT(i2c->vt->read);
 
        ASSERT(_buf);
        ASSERT(count);
@@ -288,7 +289,7 @@ INLINE void i2c_recv(I2c *i2c, void *_buf, size_t count)
        ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_R);
 
        if (!i2c->errors)
-               i2c->vt->recv(i2c, _buf, count);
+               i2c->vt->read(i2c, _buf, count);
 }
 
 INLINE int i2c_error(I2c *i2c)