SAM3 port: move some definitions in appropriate places, and add missing includes.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4246 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/drv/irq_cm3.h b/bertos/cpu/cortex-m3/drv/irq_cm3.h
index b9aee90437f2207ae3f0577d22eda52f2d8e8e80..93a75f53231515f688d02a186d4ffaabc5b978c1 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/irq_cm3.h
+++ b/bertos/cpu/cortex-m3/drv/irq_cm3.h
@@ -44,6 +44,8 @@
        #include <io/lm3s.h>
 #elif CPU_CM3_STM32
        #include <io/stm32.h>
+#elif CPU_CM3_AT91SAM3
+       #include <io/sam3.h>
 /*#elif  Add other families here */
 #else
        #error Unknown CPU

diff --git a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
index 32a099d0999410659bb95e9ec572825e3b6ad99e..e3472395dbd36295aa377bcbd291e1d0bbeca780 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
+++ b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
@@ -38,6 +38,7 @@
 #include <cfg/cfg_debug.h>
 #include <cfg/macros.h> /* for BV() */
 
+#include <io/sam3_ints.h>
 #include <io/sam3_gpio.h>
 #include <io/sam3_pmc.h>
 #include <io/sam3_uart.h>
@@ -47,16 +48,12 @@
        #define UART_BASE       UART0_BASE
        #define UART_INT        INT_UART0
        #define UART_GPIO_BASE  GPIO_PORTA_BASE
-       #ifdef CPU_CM3_AT91SAM3U
-               #define UART_PINS       (BV(12) | BV(11))
-       #else
-               #define UART_PINS       (BV(10) | BV(9))
-       #endif
+       #define UART_PINS       (GPIO_UART0_RX_PIN | GPIO_UART0_TX_PIN)
 #elif (CONFIG_KDEBUG_PORT == 1) && !defined(CPU_CM3_AT91SAM3U)
        #define UART_BASE       UART1_BASE
        #define UART_INT        INT_UART1
        #define UART_GPIO_BASE  GPIO_PORTB_BASE
-       #define UART_PINS       (BV(3) | BV(2))
+       #define UART_PINS       (GPIO_UART1_RX_PIN | GPIO_UART1_TX_PIN)
 #else
        #error "UART port not supported in this board"
 #endif

diff --git a/bertos/cpu/cortex-m3/io/cm3.h b/bertos/cpu/cortex-m3/io/cm3.h
index 3b99e1028149ac0d858001c5b3ff585c0332ea7c..e38299582675481cdf09192199b9c63845b55151 100644 (file)
--- a/bertos/cpu/cortex-m3/io/cm3.h
+++ b/bertos/cpu/cortex-m3/io/cm3.h
@@ -42,6 +42,8 @@
        #include "lm3s.h"
 #elif CPU_CM3_STM32
        #include "stm32.h"
+#elif CPU_CM3_AT91SAM3
+       #include "sam3.h"
 /*#elif  Add other Cortex-M3 CPUs here */
 #else
        #error Unknown CPU

diff --git a/bertos/cpu/cortex-m3/io/sam3.h b/bertos/cpu/cortex-m3/io/sam3.h
index c3540db38faadab5e4850aeaa26f24f94f0691e9..385221b262b69f3256efcca04657d2234b0555b0 100644 (file)
--- a/bertos/cpu/cortex-m3/io/sam3.h
+++ b/bertos/cpu/cortex-m3/io/sam3.h
@@ -42,6 +42,7 @@
 #include <cfg/compiler.h>
 
 #include "sam3_memmap.h"
+#include "sam3_ints.h"
 #include "sam3_gpio.h"
 #include "sam3_nvic.h"
 #include "sam3_uart.h"

diff --git a/bertos/cpu/cortex-m3/io/sam3_gpio.h b/bertos/cpu/cortex-m3/io/sam3_gpio.h
index 7bfccafee055c69bcca7823d7bd40d1231ccc59c..af80718b47182f61d41457f31e67be444232e1b1 100644 (file)
--- a/bertos/cpu/cortex-m3/io/sam3_gpio.h
+++ b/bertos/cpu/cortex-m3/io/sam3_gpio.h
@@ -99,4 +99,19 @@
 #define GPIO_SCHMITT  0x100  //< Schmitt Trigger Register
 /*\}*/
 
+/**
+ * UART I/O pins
+ */
+/*\{*/
+#ifdef CPU_CM3_AT91SAM3U
+       #define GPIO_UART0_RX_PIN   BV(11)
+       #define GPIO_UART0_TX_PIN   BV(12)
+#else
+       #define GPIO_UART0_RX_PIN   BV(9)
+       #define GPIO_UART0_TX_PIN   BV(10)
+       #define GPIO_UART1_RX_PIN   BV(2)
+       #define GPIO_UART1_TX_PIN   BV(3)
+#endif
+/*\}*/
+
 #endif /* SAM3_GPIO_H */

diff --git a/bertos/cpu/cortex-m3/io/sam3_pmc.h b/bertos/cpu/cortex-m3/io/sam3_pmc.h
index 4664838d0e33e86d90f9fac80831083b7454b5b6..ea5930de3b4581895279d4af2d30bbb26976bb79 100644 (file)
--- a/bertos/cpu/cortex-m3/io/sam3_pmc.h
+++ b/bertos/cpu/cortex-m3/io/sam3_pmc.h
@@ -36,34 +36,6 @@
 #ifndef SAM3_PMC_H
 #define SAM3_PMC_H
 
-// FIXME: move these in sam3(?)_int.h
-#define INT_SUPC     0  ///< SAM3N Supply Controller (SUPC)
-#define INT_RSTC     1  ///< SAM3N Reset Controller (RSTC)
-#define INT_RTC      2  ///< SAM3N Real Time Clock (RTC)
-#define INT_RTT      3  ///< SAM3N Real Time Timer (RTT)
-#define INT_WDT      4  ///< SAM3N Watchdog Timer (WDT)
-#define INT_PMC      5  ///< SAM3N Power Management Controller (PMC)
-#define INT_EFC      6  ///< SAM3N Enhanced Flash Controller (EFC)
-#define INT_UART0    8  ///< SAM3N UART 0 (UART0)
-#define INT_UART1    9  ///< SAM3N UART 1 (UART1)
-#define INT_PIOA    11  ///< SAM3N Parallel I/O Controller A (PIOA)
-#define INT_PIOB    12  ///< SAM3N Parallel I/O Controller B (PIOB)
-#define INT_PIOC    13  ///< SAM3N Parallel I/O Controller C (PIOC)
-#define INT_USART0  14  ///< SAM3N USART 0 (USART0)
-#define INT_USART1  15  ///< SAM3N USART 1 (USART1)
-#define INT_TWI0    19  ///< SAM3N Two Wire Interface 0 (TWI0)
-#define INT_TWI1    20  ///< SAM3N Two Wire Interface 1 (TWI1)
-#define INT_SPI     21  ///< SAM3N Serial Peripheral Interface (SPI)
-#define INT_TC0     23  ///< SAM3N Timer/Counter 0 (TC0)
-#define INT_TC1     24  ///< SAM3N Timer/Counter 1 (TC1)
-#define INT_TC2     25  ///< SAM3N Timer/Counter 2 (TC2)
-#define INT_TC3     26  ///< SAM3N Timer/Counter 3 (TC3)
-#define INT_TC4     27  ///< SAM3N Timer/Counter 4 (TC4)
-#define INT_TC5     28  ///< SAM3N Timer/Counter 5 (TC5)
-#define INT_ADC     29  ///< SAM3N Analog To Digital Converter (ADC)
-#define INT_DACC    30  ///< SAM3N Digital To Analog Converter (DACC)
-#define INT_PWM     31  ///< SAM3N Pulse Width Modulation (PWM)
-
 /**
  * PMC registers.
  */

diff --git a/bertos/cpu/cortex-m3/io/sam3_uart.h b/bertos/cpu/cortex-m3/io/sam3_uart.h
index f21bd051ef00f9e6b098efae90b143c0cc55f096..dfe0d8c363ffd07a32945925ea108f35bcf12311 100644 (file)
--- a/bertos/cpu/cortex-m3/io/sam3_uart.h
+++ b/bertos/cpu/cortex-m3/io/sam3_uart.h
@@ -275,5 +275,4 @@
 #define UART_PTSR_TXTEN   BV(8)  //< Transmitter Transfer Enable
 /*\}*/
 
-
 #endif /* SAM3_UART_H */